DocumentCode :
3443655
Title :
A high performance CMOS chipset for FFT processors
Author :
Shen, S. ; Magar, S. ; Aguilar, R. ; Luikuo, G. ; Fleming, M. ; Rishavy, K. ; Murphy, K. ; Furman, C.
Author_Institution :
Honeywell Inc., Colorado Springs, CO, USA
fYear :
1988
fDate :
3-5 Oct 1988
Firstpage :
578
Lastpage :
581
Abstract :
The authors describe a chipset (processor and controller) developed recently to implement the FFT (fast Fourier transform) algorithm on silicon. As the result of the highly parallel and concurrent architecture, the FFT processor built with one chip set can operate at a computing rate of about 500 million operations per second and an I/O transfer rate of about 5 billion b/s when running with 50-MHz input clock frequency. Utilizing multiprocessing techniques built into the architecture, the aggregated throughput is linearly proportional to the number of nodes employed in the FFT processor system. Using five nodes, each node consisting of a chip set, it can perform a 1024-point complex FFT in 21 μs
Keywords :
CMOS integrated circuits; digital signal processing chips; fast Fourier transforms; 50 MHz; 50-MHz; FFT processors; controller; high performance CMOS chipset; multiprocessing techniques; processor; CMOS process; Control systems; Costs; Digital integrated circuits; Discrete Fourier transforms; Frequency; Hardware; Process control; Signal processing algorithms; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on
Conference_Location :
Rye Brook, NY
Print_ISBN :
0-8186-0872-2
Type :
conf
DOI :
10.1109/ICCD.1988.25766
Filename :
25766
Link To Document :
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