• DocumentCode
    3443870
  • Title

    A functional approach to formal hardware verification: the MTI experience

  • Author

    Borritone, D. ; Camurati, P. ; Paillet, J.L. ; Prinetto, P.

  • Author_Institution
    Provence Univ., Marseille, France
  • fYear
    1988
  • fDate
    3-5 Oct 1988
  • Firstpage
    592
  • Lastpage
    595
  • Abstract
    The authors present the application of formal verification techniques to the MTI (Microprocesseur a test integre) microprocessor. The device is described and verified using a functional model. The authors note that the application is a real, rather than a verification-oriented microprocessor, whose description was available to them under the form of schematic and timing diagrams and as output of CAD (computer-aided design) tools. The effort is two-fold: (1) the authors verify the MTI microprocessor, finding some subtle bugs which had escaped the designers´ attention, and (2) they develop a methodology whose applicability ranges beyond the particular case it has been demonstrated on
  • Keywords
    computer testing; formal specification; microprocessor chips; CAD; MTI experience; formal hardware verification; functional approach; microprocessor; timing diagrams; Art; Benchmark testing; Circuits; Design automation; Formal verification; Hardware; Logic; Microprocessors; Performance evaluation; State-space methods;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on
  • Conference_Location
    Rye Brook, NY
  • Print_ISBN
    0-8186-0872-2
  • Type

    conf

  • DOI
    10.1109/ICCD.1988.25769
  • Filename
    25769