Redundant states in five-level inverter using selective harmonics elimination PWM

This study deals the problem of DC-link capacitor voltages balance in five-level inverter. The proposed solution is based on the redundant switching vectors using the selective harmonics elimination SHEPWM instead of space vector modulation [3]. The inverter supplies a high power induction motor of 20MW. The obtained results prove that the balancing of the dc capacitor is kept with canceling the most undesirable harmonics row 5^th, 7^th, and 11^th.