Title :
Built-in self-repairable cube-connected cycles architectures and their reliability analyses
Author :
Takanami, Itsuo ; Kurata, Kazushi
Author_Institution :
Dept. of Comput. Sci., Iwate Univ., Morioka, Japan
Abstract :
Processors in a cube-connected cycles (CCC) architecture are laid out in two dimensions where the processors on the same dimension of the CCC are in the same row. We consider the reconstruction schemes of replacing faulty processors where processors on each dimension of a CCC are considered to comprise a linear array in which spare processors are inserted at proper intervals. Three methods for spare allocation are considered, and the necessary and sufficient conditions for their reconfigurabilities are given. According to the conditions, the formulas for computing systems reliabilities are obtained. The reliabilities and yields of the systems considered are compared with those of other systems already known. Furthermore, the built-in self-repairable systems are realized using simple switching circuits for reconstruction
Keywords :
computer network reliability; fault tolerant computing; hypercube networks; built-in self-repairable cube-connected cycles architectures; computing systems reliabilities; faulty processors; linear array; necessary and sufficient conditions; reconstruction schemes; reliability analyses; spare allocation; switching circuits; Circuit faults; Computer architecture; Computer network reliability; Computer science; Concurrent computing; Reliability engineering; Switching circuits; Systems engineering and theory; Very large scale integration; Wafer scale integration;
Conference_Titel :
Fault-Tolerant Parallel and Distributed Systems, 1994., Proceedings of IEEE Workshop on
Conference_Location :
College Station, TX
Print_ISBN :
0-8186-6807-5
DOI :
10.1109/FTPDS.1994.494480
