DocumentCode
3444578
Title
A Taxonomy of Data Prefetching Mechanisms
Author
Byna, Surendra ; Chen, Yong ; Sun, Xian-He
Author_Institution
Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL
fYear
2008
fDate
7-9 May 2008
Firstpage
19
Lastpage
24
Abstract
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been proposed in the last few years to reduce data access latency by taking advantage of multi-core architectures. In this paper, we propose a taxonomy that classifies various design concerns in developing a prefetching strategy. We discuss various prefetching strategies and issues that have to be considered in designing a prefetching strategy for multi-core processors.
Keywords
cache storage; data access latency; data prefetching mechanisms; multicore processors; taxonomy; Computer architecture; Delay; Hardware; History; Multicore processing; Parallel architectures; Prefetching; Sun; Taxonomy; Yarn; Data Prefetching; Prefetching Survey; Prefetching Taxonomy;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures, Algorithms, and Networks, 2008. I-SPAN 2008. International Symposium on
Conference_Location
Sydney, NSW
ISSN
1087-4089
Print_ISBN
978-0-7695-3125-0
Type
conf
DOI
10.1109/I-SPAN.2008.24
Filename
4520189
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