Title :
Performance evaluation of 50 nm In/sub 0.7/Ga/sub 0.3/As HEMTs for beyond-CMOS logic applications
Author :
Kim, Dae-Hyun ; Del Alamo, Jesús A. ; Lee, Jae.-Hak. ; Seo, Kwang-Seok
Author_Institution :
Massachusetts Inst. of Technol., Cambridge, MA
Abstract :
We have studied the suitability of nanometer-scale In0.7Ga0.3As HEMTs as a high-speed, low-power logic technology for beyond-CMOS applications. To this end, we have fabricated 50-150 nm gate length In0.7Ga0.3As HEMTs with different gate stack designs. The 50 nm HEMTs exhibit ION/IOFF ratios in excess of 105 and DIBL less than 90 mV/dec. Compared with state-of-the-art Si MOSFETs, the non-optimized 50 nm In0.7Ga0.3As HEMTs provide equivalent highspeed performance with 15 times lower DC power dissipation and at least 2.7 times higher fT at equivalent power dissipation level. In the landscape of alternatives for beyond CMOS technologies, InAs-rich InGaAs HEMTs hold considerable promise
Keywords :
CMOS logic circuits; III-V semiconductors; gallium arsenide; high electron mobility transistors; indium compounds; 50 nm; 50 to 150 nm; CMOS logic applications; HEMT; In0.7Ga0.3As; MOSFET; gate stack designs; high electron mobility transistors; CMOS technology; Foot; HEMTs; Indium compounds; Indium gallium arsenide; Indium phosphide; Insulation; Logic devices; MODFETs; Magnetic heads;
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
DOI :
10.1109/IEDM.2005.1609467