DocumentCode :
3445592
Title :
Device and circuit-level analog performance trade-offs: a comparative study of planar bulk FETs versus FinFETs
Author :
Subramanian, V. ; Parvais, B. ; Borremans, J. ; Mercha, A. ; Linten, D. ; Wambacq, P. ; Loo, J. ; Dehan, M. ; Collaert, N. ; Kubicek, S. ; Lander, R.J.P. ; Hooker, J.C. ; Cubaynes, F.N. ; Donnay, S. ; Jurczak, M. ; Groeseneken, G. ; Sansen, W. ; Decoutere
Author_Institution :
IMEC, Leuven
fYear :
2005
fDate :
5-5 Dec. 2005
Firstpage :
898
Lastpage :
901
Abstract :
Comparison of digital and analog figures-of-merit of FinFETs and planar bulk MOSFETs reveals an interesting trade-off in analog/RF design space. It is seen that FinFETs possess key advantages over bulk FETs for applications around 5 GHz where the performance-power trade-off is important. In case of higher frequency applications bulk MOSFETs are shown to hold the advantage on account of their higher transconductance (Gm), provided a degraded voltage gain and a higher leakage current can be tolerated
Keywords :
MOSFET; analogue integrated circuits; field effect transistors; FinFET; analog/RF design; circuit-level analog performance; figures-of-merit; higher transconductance; planar bulk FET; planar bulk MOSFET; trade-off; Circuits; Degradation; FETs; FinFETs; High K dielectric materials; High-K gate dielectrics; MOSFETs; Radio frequency; Transconductance; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
Type :
conf
DOI :
10.1109/IEDM.2005.1609503
Filename :
1609503
Link To Document :
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