DocumentCode
3445990
Title
From DRAM to SRAM with a novel sige-based negative differential resistance (NDR) device
Author
Liang, Yue ; Gopalakrishnan, Kailash ; Griffin, Peter B. ; Plummer, James D.
Author_Institution
Center for Integrated Syst., Stanford Univ., CA
fYear
2005
fDate
5-5 Dec. 2005
Firstpage
959
Lastpage
962
Abstract
This paper presents a novel CMOS-compatible negative differential resistance (NDR) device based on SiGe gated diodes. Experimental results on various prototypes show that this device has very high peak currents and the highest reported peak-to-valley current ratios in SiGe systems to date. This NDR element can be easily integrated into a normal 1T1C DRAM cell to enable an SRAM-like operation with a much more compact cell size
Keywords
CMOS integrated circuits; DRAM chips; Ge-Si alloys; SRAM chips; semiconductor diodes; CMOS; DRAM; SRAM; SiGe; gated diodes; negative differential resistance device; peak currents; Bismuth; Capacitors; Diodes; Germanium silicon alloys; Prototypes; Random access memory; Research and development; Silicon germanium; Threshold voltage; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location
Washington, DC
Print_ISBN
0-7803-9268-X
Type
conf
DOI
10.1109/IEDM.2005.1609520
Filename
1609520
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