DocumentCode :
3446105
Title :
Moderately doped channel multiple-finFET for logic applications
Author :
Shiho, Yasuhito ; Burnett, David ; Orlowski, Marius ; Mogab, Joe
Author_Institution :
Adv. Products Res. & Dev. Lab., Freescale Semicond. Inc., Austin, TX
fYear :
2005
fDate :
5-5 Dec. 2005
Firstpage :
976
Lastpage :
979
Abstract :
In this paper, moderately doped channel (MDC) multiple-FinFET is proposed and its electrical characteristics are investigated using 3D process and device, and 2D mixed-mode device and circuit simulation. It is shown that the MDC offers a better immunity to variations of the fin profile than the undoped channel for a short channel device, and Multiple-FinFET is critical for logic applications. The implementation of an asymmetrical doping profile further improves the performance of MDC Multiple-FinFET
Keywords :
CMOS logic circuits; MOSFET; circuit simulation; semiconductor doping; 2D mixed mode device; 3D device; asymmetrical doping; circuit simulation; electrical characteristics; fin profile; logic applications; moderately doped channel; multiple FinFET; short channel device; undoped channel; CMOS logic circuits; Doping profiles; Electric variables; FETs; FinFETs; Laboratories; Logic devices; MOSFETs; Research and development; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
Type :
conf
DOI :
10.1109/IEDM.2005.1609525
Filename :
1609525
Link To Document :
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