Title :
Temperature constant BT tests of parasitic MOSFETs
Author_Institution :
Suwa Coll., Sci. Univ. of Tokyo, Japan
Abstract :
A new technique is proposed for Bias-Temperature (BT) stress tests of parasitic MOSFETs: the temperature is kept constant during the BT stress and Vt measurement steps. Application of a positive substrate bias, Vb, makes the threshold voltage, Vt, smaller than the stress bias, so that Vt remains stable during the measurement. The method is applied to evaluate A1-2 NMOSFETs with pTEOS adopted as an intermetallic oxide. Both positive and negative instabilities are found depending on the planarization process
Keywords :
MOSFET; semiconductor device reliability; semiconductor device testing; stability; 100 to 175 C; 15 to 200 V; NMOSFETs; bias-temperature stress tests; negative instabilities; pTEOS intermetallic oxide; parasitic MOSFETs; positive instabilities; positive substrate bias; temperature constant BT tests; threshold voltage; Inorganic materials; Intermetallic; MOSFETs; Organic materials; Plasma temperature; Pollution measurement; Qualifications; Stress measurement; Testing; Voltage;
Conference_Titel :
Integrated Reliability Workshop, 1996., IEEE International
Conference_Location :
Lake Tahoe, CA
Print_ISBN :
0-7803-3598-8
DOI :
10.1109/IRWS.1996.583390
