DocumentCode
3447501
Title
Characterization and modeling NBTI for design-in reliability
Author
Parthasarathy, C.R. ; Denais, M. ; Huard, V. ; Ribes, G. ; Vincent, E. ; Bravaix, A.
Author_Institution
STMicroelectronics, Crolles
fYear
2005
fDate
17-20 Oct. 2005
Abstract
This paper discusses the characterization and modeling methodology for NBTI for subsequent use in reliability simulations. Given the integral recovery post NBTI stress, we use on-the-fly technique to measure degradation. A new and fully experimental means of interpretation of results from OTF is presented. We also present some new evidence of hole-trapping/detrapping during NBTI degradation
Keywords
hole traps; integrated circuit design; integrated circuit modelling; integrated circuit reliability; NBTI degradation; design-in reliability; hole detrapping; hole-trapping; integral recovery post NBTI stress; negative bias temperature instability; reliability simulations; CMOS technology; Capacitance; Circuits; Degradation; Monitoring; Niobium compounds; Stress measurement; Time measurement; Titanium compounds; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Reliability Workshop Final Report, 2005 IEEE International
Conference_Location
S. Lake Tahoe, CA
Print_ISBN
0-7803-8992-1
Type
conf
DOI
10.1109/IRWS.2005.1609593
Filename
1609593
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