DocumentCode
344811
Title
A parallel ΣΔ modulator
Author
Lyden, Colin ; Collins, John
Author_Institution
Nat. Microelectron. Res. Centre, Cork, Ireland
fYear
1999
fDate
1999
Firstpage
42
Lastpage
45
Abstract
A sigma delta ADC modulator architecture is described. The modulator performs the processing of two or more clock cycles in parallel. In contrast to previously published parallel sigma delta architectures, an increase in the number of integrators is not required. Rather, the number of signal inputs to the integrators is increased as is the number of quantisers
Keywords
parallel processing; ADC modulator architecture; integrators; parallel ΣΔ modulator; parallel clock cycle processing; quantisers; signal inputs;
fLanguage
English
Publisher
iet
Conference_Titel
Advanced A/D and D/A Conversion Techniques and Their Applications, 1999. Third International Conference on (Conf. Publ. No. 466)
Conference_Location
Glasgow
ISSN
0537-9989
Print_ISBN
0-85296-718-7
Type
conf
DOI
10.1049/cp:19990459
Filename
793960
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