VHDL-A: a new language for modeling and simulation of heterogeneous systems

Author

Glesner, Manfred ; Hofmann, Klaus

Author_Institution

Inst. of Microelectron. Syst., Tech. Hochschule Darmstadt, Germany

fYear

1995

fDate

11-14 Oct 1995

Firstpage

37

Lastpage

46

Abstract

The need for a common hardware description language (HDL) for mixed analog/digital ASICs has been realized and efforts are currently underway to define and implement an extension of VHDL towards analog language constructs. The authors discuss the progress in implementation and some of the main features of VHDL-A, which will be part of the final VHDL´97 standard. The CAD tools available for preliminary versions of VHDL-A are mentioned briefly

Keywords

circuit analysis computing; hardware description languages; integrated circuit design; integrated circuit modelling; mixed analogue-digital integrated circuits; software standards; CAD tools; VHDL´97 standard; VHDL-A; analog language constructs; analogue HDL; hardware description language; heterogeneous systems; mixed analog/digital ASICs; modeling; simulation; Defense industry; Design automation; Hardware design languages; Joining processes; Logic design; Logic gates; Microelectronics; Microprocessors; Propagation delay; Very high speed integrated circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference, 1995. CAS'95 Proceedings., 1995 International

Conference_Location

Sinaia

Print_ISBN

0-7803-2647-4

Type

conf

DOI

10.1109/SMICND.1995.494860

Filename

494860