DocumentCode :
3450017
Title :
An analysis of determinacy using a trace-theoretic model of asynchronous circuits
Author :
Josephs, Mark B.
Author_Institution :
Sch. of Comput., South Bank Univ., London, UK
fYear :
2003
fDate :
12-15 May 2003
Firstpage :
121
Lastpage :
130
Abstract :
Receptive process theory provides a semantic model for reasoning about input/output-systems in general, and about the switching behaviour of asynchronous circuits in particular. As in the failures/divergences model of Hoare´s CSP, nondeterministic behaviour, as might result from the use of arbiters and synchronizers, can be modelled. A new result is the identification of the class of deterministic receptive processes, which is closed under composition. The defining characteristic of the class is that the behaviour of its members can be adequately described using a traces/divergences model. The closure of the class is proved with respect to a binary, parallel composition operator which allows inputs to be forked isochronically to both components and which conceals those outputs of either component that are inputs to the other component. This result contrasts with CSP, in which determinacy is not preserved when events are concealed.
Keywords :
asynchronous circuits; logic design; logic gates; process algebra; switching theory; asynchronous circuit design; determinacy analysis; deterministic receptive processes; nondeterministic behaviour; receptive process theory; switching behaviour; trace-theoretic model; traces/divergences model; Asynchronous circuits; Chromium; Circuit analysis computing; Concurrent computing; Information analysis; Information systems; Mathematical model; Mathematics; Switching circuits; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asynchronous Circuits and Systems, 2003. Proceedings. Ninth International Symposium on
ISSN :
1522-8681
Print_ISBN :
0-7695-1898-2
Type :
conf
DOI :
10.1109/ASYNC.2003.1199172
Filename :
1199172
Link To Document :
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