DocumentCode
3450376
Title
On the leverage of high f T transistors for advanced high-speed bipolar circuits
Author
Chuang, C.T. ; Chin, K. ; Stork, J.M.C. ; Patton, G.L. ; Crabbe, E.F. ; Comfort, J.H.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
1991
fDate
9-10 Sep 1991
Firstpage
142
Lastpage
145
Abstract
The authors present a detailed study on the leverage of high-f T transistors for advanced high-speed bipolar circuit applications. It is shown that, for the standard ECL (emitter coupled logic) circuit, the leverage of high f T is limited by the passive resistors (emitter-follower resistor and collector load resistor) and wire delay, especially in the low-power regime. For the standard NTL circuit, the leverage is higher due to its front-end configuration and lower power supply value. As the passive resistors are decoupled from the delay path in various advanced circuits utilizing active-pull-down schemes, the leverage of high f T becomes more significant
Keywords
bipolar integrated circuits; bipolar transistors; emitter-coupled logic; integrated circuit technology; integrated logic circuits; NTL circuit; active-pull-down schemes; collector load resistor; emitter coupled logic; emitter-follower resistor; front-end configuration; high-speed bipolar circuits; high-speed digital circuits; leverage of high fT transistors; passive resistors; wire delay; Bipolar transistor circuits; Bipolar transistors; Boron; Capacitance; Delay effects; Heterojunction bipolar transistors; Power supplies; Resistors; Tunneling; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar Circuits and Technology Meeting, 1991., Proceedings of the 1991
Conference_Location
Minneapolis, MN
Print_ISBN
0-7803-0103-X
Type
conf
DOI
10.1109/BIPOL.1991.160973
Filename
160973
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