Implementation of the Chien search algorithm on application specific instruction set processor

In this paper, we discuss the implementation of the BCH decoder Chien search algorithm on a SIMD style application specific instruction set processor with minimum memory footprint and processing time degradation. We minimize its memory usage and processing time by deriving a computation rule, which is used to efficiently generate memory consuming primitive elements and their power terms upon the SIMD datapath, instead of storing all pre-computed terms in the memory.