DocumentCode
3450815
Title
Investigation of dimension effects of FD-S-SOI MOSFET in nanoscale
Author
Sushanta Kumar Mohapatra ; Kumar Prasannajit Pradhan ; Prasanna Kumar Sahu
Author_Institution
Department of Electrical Engineering, National Institute of Technology, Rourkela-769008, Odisha, India
fYear
2012
fDate
19-21 Dec. 2012
Firstpage
1
Lastpage
4
Abstract
Continuous scaling in MOSFET devices degrade the performance of the devices as a result leakage currents and short channel effects (SCEs) are major problems. To overcome these problems a device Silicon-on-Insulator (SOI) MOSFET has been developed. Again the Fully Depleted (FD) SOI MOSFETs also suffer from the SCEs in sub-65 nm technology regime, then to overcome this Strain engineering came to the picture. In this paper we have taken an FD-SOI-MOSFET with Strain engineering for three different channel lengths (100 nm, 60 nm and 30 nm) and we show how the strain engineering also fails below 30 nm channel length. We also examined the short channel parameters like DIBL, Ioff , HCE, SS, Electric Field, Surface Potential, Transconductance and Gain for the FD-Strained-SOI MOSFET with varying the channel length.
Keywords
Device simulator ATLAS™; Nanoscale; SCEs; SOI; strained Si (s-Si);
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging Technology Trends in Electronics, Communication and Networking (ET2ECN), 2012 1st International Conference on
Conference_Location
Surat, Gujarat, India
Print_ISBN
978-1-4673-1628-6
Type
conf
DOI
10.1109/ET2ECN.2012.6470075
Filename
6470075
Link To Document