Title :
Experimental validation of electrothermal simulations using SETIPIC for analogue integrated circuits
Author :
Ecrabey, Jacques ; Hebrard, Luc ; Klingeihofer, C. ; Gaffiot, F. ; Jacquemod, Gilles ; Toussan, Josette Berger ; Helley, Michel Le
Author_Institution :
CNRS, Ecole Centrale de Lyon, Ecully, France
fDate :
31 May-3 Jun 1994
Abstract :
This paper presents the validation of SETIPIC-an electrothermal simulator for power integrated circuits. SETIPIC works by alternation of electrical simulations, using a SPICE-like simulator and thermal simulations using PICMOST-a three-dimensional thermal simulator we wrote to obtain the thermal distribution on the layout surface in a transient or stationary mode. Also, an infrared thermal measurement experimental set up was built to validate SETIPIC on an industrial IC and some thermal results are given
Keywords :
power integrated circuits; PICMOST; SETIPIC; SPICE; analogue integrated circuits; electrical simulator; electrothermal simulations; industrial IC; infrared thermal measurement; layout surface; power integrated circuits; stationary mode; thermal distribution; three-dimensional thermal simulator; transient mode; Analog integrated circuits; Circuit simulation; Coupling circuits; Electrothermal effects; Packaging; Power integrated circuits; SPICE; Semiconductor device measurement; Temperature; Thermal conductivity;
Conference_Titel :
Power Semiconductor Devices and ICs, 1994. ISPSD '94., Proceedings of the 6th International Symposium on
Conference_Location :
Davos
Print_ISBN :
0-7803-1494-8
DOI :
10.1109/ISPSD.1994.583740
