Title :
High-performance lateral DMOSFET with oxide sidewall-spacers
Author :
Fujishima, Naoto ; Kitamura, Akio ; Nagayasu, Yoshihiko
Author_Institution :
Fuji Electr. Corp. Res. & Dev. Ltd., Matsumoto, Japan
fDate :
31 May-3 Jun 1994
Abstract :
A new lateral DMOSFET which utilizes oxide sidewall-spacers is described. The effective channel length is precisely controlled by the length of the spacer. The lateral DMOSFET with a channel length of 0.4 μm shows a low channel resistance keeping high punch-through blocking capability. The process is compatible with the conventional 1 μm Bi-CMOS process. The device characteristics are predicted by two-dimensional process and device simulators. Measurement results are also described. The developed DMOSFET shows an excellent specific on-resistance of 0.143 Ω·mm2 and can withstand up to around 80 V
Keywords :
power MOSFET; 0.4 micron; 80 V; Bi-CMOS process; device characteristics; effective channel length; high-voltage power ICs; lateral DMOSFET; low channel resistance; oxide sidewall-spacers; punch-through blocking capability; specific on-resistance; two-dimensional device simulators; Control systems; Fabrication; MOS devices; MOSFETs; Oxidation; Power integrated circuits; Research and development; Space technology; Temperature; Voltage;
Conference_Titel :
Power Semiconductor Devices and ICs, 1994. ISPSD '94., Proceedings of the 6th International Symposium on
Conference_Location :
Davos
Print_ISBN :
0-7803-1494-8
DOI :
10.1109/ISPSD.1994.583768
