An integrated approach to the design and implementation of image filters

This paper presents a flexible and integrated design methodology for image filtering hardware that allows the development of high level algorithms and the automation of their ASIC implementation. The proposed approach offers the algorithm developer all the necessary tools to design and simulate the image processing algorithms at a high level of abstraction, and without any hardware constraints. Once the algorithm has been completely specified its high level description is synthesised, with minimum intervention from the algorithm developer, to one of several levels of hardware description including RTL VHDL and a netlist of the ASIC target technology. The proposed development process uses Mentor Graphics DSP Station. DSP Station is a development system for signal processing hardware and it is not offered as an image processing development tool. This paper describes the adaptation of DSP Station as an integrated environment for the development of image processing algorithms and their ASIC implementation. The design methodology is illustrated by an example algorithm of a 2-D image filter and its architectural implementation