DocumentCode :
3453955
Title :
Memory processing unit in video decoding system
Author :
Lee, Won Chang ; Song, Joon Ho ; Kim, Do-Hyung ; Lee, Shihwa
Author_Institution :
Samsung Electron., Yongin, South Korea
fYear :
2012
fDate :
13-16 Jan. 2012
Firstpage :
538
Lastpage :
539
Abstract :
A memory processing unit that controls DDR-SDRAM data transfer of video decoding process is presented. Memory processor unit can support all the video standards and reduce memory bandwidth and overhead. Experimental results show that the decoding performance is enhanced about 20% than DSP only system.
Keywords :
DRAM chips; decoding; digital signal processing chips; recording; video coding; DDR-SDRAM data transfer; DSP; memory bandwidth reduction; memory processing unit; memory processor unit; overhead reduction; video decoding process; video decoding system; video standards; Bandwidth; Decoding; Digital signal processing; Process control; SDRAM; Standards;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics (ICCE), 2012 IEEE International Conference on
Conference_Location :
Las Vegas, NV
ISSN :
2158-3994
Print_ISBN :
978-1-4577-0230-3
Type :
conf
DOI :
10.1109/ICCE.2012.6161963
Filename :
6161963
Link To Document :
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