DocumentCode :
3453973
Title :
BiCMOS testability circuits for IEEE 1149.1
Author :
Mansoorian, Babak ; Shookhtim, Rimon ; Lee, Lo Shan ; Shahrokhinia, Sassan
Author_Institution :
Unisys Corp., San Diego, CA, USA
fYear :
1991
fDate :
9-10 Sep 1991
Firstpage :
214
Lastpage :
217
Abstract :
The authors introduce BiCMOS boundary scan circuits compatible with the IEEE 1149.1 standard. These circuits are designed for use in high-performance ECL (emitter coupled logic) and BiCMOS VLSI systems. System and circuit operation is described
Keywords :
BIMOS integrated circuits; VLSI; emitter-coupled logic; integrated circuit testing; integrated logic circuits; logic testing; BiCMOS testability circuits; ECL; IEEE 1149.1; VLSI systems; boundary scan circuits; emitter coupled logic; standard; BiCMOS integrated circuits; Bipolar transistors; CMOS logic circuits; CMOS technology; Circuit testing; Design for testability; MOSFETs; System testing; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Bipolar Circuits and Technology Meeting, 1991., Proceedings of the 1991
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-0103-X
Type :
conf
DOI :
10.1109/BIPOL.1991.160991
Filename :
160991
Link To Document :
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