DocumentCode :
3454231
Title :
A digitally programmable delay line and duty cycle controller with picosecond resolution
Author :
Murakami, Daisuke ; Kuwabara, Tadao
Author_Institution :
Sony Corp., Kanagawa, Japan
fYear :
1991
fDate :
9-10 Sep 1991
Firstpage :
218
Lastpage :
221
Abstract :
A digitally programmable delay line and duty cycle controller with picosecond resolution is described. By using new circuits, it is possible to realize a timing range greater than 20 ns, with 4-ps resolution, a bandwidth greater than 800 MHz, and a power dissipation of 870 mW. The 2.34 mm×2.70 mm chip was fabricated on ECL-3, an advanced silicon ECL (emitter coupled logic) process
Keywords :
bipolar integrated circuits; delay lines; emitter-coupled logic; integrated logic circuits; timing circuits; 800 MHz; 870 mW; ECL; ECL-3; Si; delay line; digitally programmable; duty cycle controller; emitter coupled logic; picosecond resolution; Bandwidth; Circuits; Delay effects; Delay lines; Differential amplifiers; Linearity; Multiplexing; Power dissipation; Signal resolution; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Bipolar Circuits and Technology Meeting, 1991., Proceedings of the 1991
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-0103-X
Type :
conf
DOI :
10.1109/BIPOL.1991.160992
Filename :
160992
Link To Document :
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