DocumentCode :
3455856
Title :
A Memory-Effective Fault-Tolerant Routing Strategy for Direct Interconnection Networks
Author :
Gómez, M.E. ; López, P. ; Duato, J.
Author_Institution :
Dept. of Comput. Eng., Univ. Politecnica de Valencia
fYear :
2005
fDate :
4-6 July 2005
Firstpage :
341
Lastpage :
348
Abstract :
High-performance interconnection networks are crucial in massively parallel computers. Routing is one of the most important design issues of interconnection networks. Moreover, the huge amount of hardware of these machines makes fault-tolerance another important design issue. In this paper, we propose a mechanism that combines scalable routing and fault-tolerance for commercial switches to build direct regular topologies, which are the topologies used in large machines. The hardware required is not complex. Furthermore, it allows a high degree of fault-tolerance inflicting a minimal decrease of performance
Keywords :
fault tolerance; multiprocessor interconnection networks; telecommunication network reliability; telecommunication network routing; adaptive routing; direct interconnection networks; distributed routing; memory-effective fault-tolerant routing; Clustering algorithms; Computer networks; Concurrent computing; Distributed computing; Fault tolerance; Hardware; Multiprocessor interconnection networks; Network topology; Routing; Switches; Memory-effective routing; adaptive routing.; distributed routing; fault-tolerance; regular topologies;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Computing, 2005. ISPDC 2005. The 4th International Symposium on
Conference_Location :
Lille
Print_ISBN :
0-7695-2434-6
Type :
conf
DOI :
10.1109/ISPDC.2005.6
Filename :
1609988
Link To Document :
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