• DocumentCode
    3456171
  • Title

    Rapid design of specific MPSoC prototype within FPGA

  • Author

    Kallel, Emna ; Aoudni, Yassine ; Abid, Mohamed

  • Author_Institution
    Electr. Dept., Nat. Sch. of Eng. of Sfax, Sfax, Tunisia
  • fYear
    2009
  • fDate
    6-8 Nov. 2009
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    This paper presents an idea of automatic generation of SoC architecture from a functional specification. Starting from an application task graph, C code will be generated automatically. Then the user can add the specific code of each task. Compilation rules are used in order to have a correct task graph and c code. Finally, an automatic generation of hardware and software SoC architecture will be down to get a new model prototype of the FPGA based SOC platform. We demonstrate the effectiveness of the proposed idea by the implementation of CAGT software tool which can generate efficient and correct C code from a task graph. The generated code is compliant to the ANSI C standard thus can be accepted by most compilers.
  • Keywords
    ANSI standards; field programmable gate arrays; program compilers; software tools; system-on-chip; ANSI C standard; C code; CAGT software tool; FPGA; SoC architecture; application task graph; compilation rules; compilers; specific MPSoC prototype; Application software; Computer architecture; Design engineering; Design methodology; Educational institutions; Embedded software; Field programmable gate arrays; Operating systems; Prototypes; Scheduling; Compilation rules; SoC architecture; automatic code generation; functional specification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Circuits and Systems (SCS), 2009 3rd International Conference on
  • Conference_Location
    Medenine
  • Print_ISBN
    978-1-4244-4397-0
  • Electronic_ISBN
    978-1-4244-4398-7
  • Type

    conf

  • DOI
    10.1109/ICSCS.2009.5412331
  • Filename
    5412331