• DocumentCode
    3456514
  • Title

    Performance analysis of a low implementation complexity digital filter structure

  • Author

    Guo, Jinqiang ; Yang, Dehui ; Huang, Chaogeng

  • Author_Institution
    Coll. of Inf. Eng., Zhejiang Univ. of Technol., Hangzhou, China
  • fYear
    2010
  • fDate
    21-23 June 2010
  • Firstpage
    104
  • Lastpage
    108
  • Abstract
    It is well known that lattice filters have excellent finite word length properties and that there are five elementary lattice building blocks. A lattice structure may yield very different figures of performance when different elementary lattice blocks are used. This allows us to optimize the structure w.r.t. these elementary blocks. In this paper, a new lattice configuration is proposed, in which the traditional tapped/injected numerator structure with each stage realized using an optimally chosen one-multiplier elementary lattice block in the sense that the signal power ratio of the structure is minimized. For an Nth order filter, such a structure possesses only 2N +1 multipliers. Simulation results show that the optimized structure outperforms the classical tapped and injected numerator lattice structures, in which two-multiplier elementary lattice blocks are utilized, in terms of reducing implementation complexity and minimizing the signal power ratio.
  • Keywords
    circuit complexity; digital filters; lattice filters; multiplying circuits; 2N +1 multiplier structure; Nth order filter; elementary lattice building blocks; finite word length effects; lattice filters; low implementation complexity digital filter structure; one-multiplier elementary lattice block; signal power ratio; tapped-injected numerator lattice structure; two-multiplier elementary lattice blocks; Chaos; Clocks; Degradation; Delay effects; Digital filters; Educational institutions; Lattices; Performance analysis; Signal to noise ratio; Transfer functions; Digital filter structures; finite wordlength; lattice filters; signal power ratio;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Green Circuits and Systems (ICGCS), 2010 International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-6876-8
  • Electronic_ISBN
    978-1-4244-6877-5
  • Type

    conf

  • DOI
    10.1109/ICGCS.2010.5543088
  • Filename
    5543088