DocumentCode
3456963
Title
Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading
Author
Porter, Leo ; Choi, Bumyong ; Tullsen, Dean M.
Author_Institution
Univ. of California, San Diego, CA, USA
fYear
2009
fDate
12-16 Sept. 2009
Firstpage
313
Lastpage
324
Abstract
This research demonstrates that coming support for hardware transactional memory can be leveraged to significantly reduce the cost of implementing true speculative multithreading. In particular, it explores the path from eager conflict detection HTM to full support of efficient speculative multithreading, focusing on the case where frequent memory dependencies exist between speculative threads. The result is a unified memory architecture capable of effective support for transactional parallel workloads and efficient speculative multithreading.
Keywords
multi-threading; storage management; transaction processing; eager conflict detection; hardware transactional memory; speculative multithreading; unified memory architecture; Concurrent computing; Costs; Hardware; Memory architecture; Multithreading; Parallel architectures; Program processors; Programming profession; Sun; Yarn; Chip Multiprocessors; Speculative Multithreading; Transactional Memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures and Compilation Techniques, 2009. PACT '09. 18th International Conference on
Conference_Location
Raleigh, NC
ISSN
1089-795X
Print_ISBN
978-0-7695-3771-9
Type
conf
DOI
10.1109/PACT.2009.37
Filename
5260525
Link To Document