DocumentCode
3457268
Title
40 and 60 GHz frequency doublers in 90-nm CMOS
Author
Ferndahl, Mattias ; Motlagh, Bahar M. ; Zirath, Herbert
Author_Institution
Microwave Electron. Lab., Chalmers Univ. of Technol., Goteborg, Sweden
Volume
1
fYear
2004
fDate
6-11 June 2004
Firstpage
179
Abstract
The design and characterization of both a 40 GHz and a 60 GHz frequency doublers in 90-nm CMOS technology is presented. Conversion loss of 15.8 dB at 40 GHz output frequency with 3 dBm input power and 15.3 dB at 60 GHz with 5 dBm input power was achieved for the two frequency doublers. The power consumption was about 4 mW for both designs.
Keywords
CMOS integrated circuits; frequency multipliers; integrated circuit design; millimetre wave devices; nanoelectronics; 15.8 dB; 40 GHz; 60 GHz; 90 nm; CMOS technology; K-band; V-band; conversion loss; frequency doubler; millimeter wave; power consumption; CMOS technology; Circuits; Energy consumption; Frequency conversion; Millimeter wave communication; Millimeter wave technology; Power harmonic filters; Power measurement; Power system harmonics; Power transmission lines;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2004 IEEE MTT-S International
ISSN
0149-645X
Print_ISBN
0-7803-8331-1
Type
conf
DOI
10.1109/MWSYM.2004.1335837
Filename
1335837
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