A new active compensator scheme for dynamic voltage scaling in voltage regulators

Dynamic voltage scaling (DVS) techniques are used to optimize the power consumption of the microprocessor by reducing the operating voltage under light-load conditions. To maximize the power saving of DVS, the voltage regulator should adjust the operating voltage to the new voltage commanded by the system as soon as possible. However the voltage regulator output capacitors and the compensation network may impact the voltage transitioning and settling time during DVS operation. In this paper, these impacts are discussed in detail and an active compensator scheme is proposed to optimize the DVS performance. Experimental results are included to illustrate the effectiveness of the proposed scheme.