A novel phase interleaving algorithm for multi-terminal systems

This paper introduces a novel phase interleaving algorithm for asymmetric multi-terminal systems. Through variable phase interleaving (Vl-algorithm) the fundamental frequency component in the DC-link current and voltage are thoroughly eliminated even if the input voltage and current of each phase differs from each other. Therefore the cost of the DC- link capacitor can be significantly reduced compared to the standard interleaving algorithm. As a concrete application, the Vl-algorithm is integrated into a photovoltaic inverter with three-phase input stage. The paper also provides a method for determining the required DC-link capacitance through a worst case analysis. The experimental results show that the Vl- algorithm does not require any additional hardware and has only slight influence on the control loop of the converters simplifying the integration of this algorithm.