DocumentCode :
3459343
Title :
Floating Point Implementation of FFT Using a Novel ESL Design Flow
Author :
Li, Yibin ; Chouliaras, Vassilios
fYear :
2009
fDate :
7-9 Dec. 2009
Firstpage :
664
Lastpage :
666
Abstract :
To demonstrate the benefit of electronic system level (ESL) methodology, the development of scalar and parallel FFT engine is presented using a novel ESL design flow in this paper. A novel design flow was detailed firstly. In this design flow, a 32-bit IEEE-754 datapath was implemented. A parallelizing technique is also presented to utilize the inherent parallelism in the algorithm. According to the importance of the FFT algorithm, scalar and parallel FFT engines are developed using this design flow to demonstrate the benefit of ESL methodology.
Keywords :
fast Fourier transforms; floating point arithmetic; parallel processing; ESL design flow; FFT; IEEE-754 datapath; electronic system level; floating point implementation; parallel FFT engine; Algorithm design and analysis; Automatic control; Delay; Digital signal processing; Engines; Hardware; Libraries; Power system modeling; Synthesizers; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Innovative Computing, Information and Control (ICICIC), 2009 Fourth International Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4244-5543-0
Type :
conf
DOI :
10.1109/ICICIC.2009.212
Filename :
5412492
Link To Document :
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