DocumentCode
3459611
Title
FastForward for Efficient Pipeline Parallelism
Author
Giacomoni, John ; Moseley, Tipp ; Vachharajani, M.
Author_Institution
Univ. of Colorado at Boulder, Boulder
fYear
2007
fDate
15-19 Sept. 2007
Firstpage
407
Lastpage
407
Abstract
High-rate core-to-core communication is critical for efficient pipeline-parallel software architectures. This paper introduces FastForward, a software-only low-overhead high-rate queue algorithm for pipeline parallelism on multicore architectures. FastForward uses an architecturally- tuned domain-specific adaptation of concurrent lock-free queues to provide low-latency and low-overhead core-to- core communication. Enqueue and dequeue times on a 2 GHz Opteron 270 based system are as low as 36 ns, up to 4x faster than Lamport´s solution.
Keywords
parallel processing; pipeline processing; queueing theory; software architecture; FastForward; architecturally-tuned domain-specific adaptation; concurrent lock-free queues; high-rate core-to-core communication; multicore architectures; pipeline parallelism; pipeline-parallel software architectures; software-only low-overhead high-rate queue algorithm; Application software; Buffer storage; Computer architecture; Hardware; Multicore processing; Parallel architectures; Pipelines; Prefetching; Software architecture; Tail;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architecture and Compilation Techniques, 2007. PACT 2007. 16th International Conference on
Conference_Location
Brasov
ISSN
1089-795X
Print_ISBN
978-0-7695-2944-8
Type
conf
DOI
10.1109/PACT.2007.4336235
Filename
4336235
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