Title :
Characterization of bitline stress effects on flash cell after program/erase cycle
Author :
Liu, Y.C. ; Guo, J.C. ; Chang, K.L. ; Huang, C.I. ; Wang, M.T. ; Chang, A. ; Shone, F.
Author_Institution :
Device Dept., Macronix Int. Co. Ltd., Taiwan, China
Abstract :
The impact of degradation of Flash memory cell characteristics caused by bitline stress during program/erase cycling is investigated considering the accentuated generation rate of negative oxide trap charges and interface-states. A special emphasis is focused on the observation of a significant amount of hole traps and their movement into the channel region. These oxide damages dramatically alter the device characteristics, and initiate severe read-disturb issue
Keywords :
EPROM; hole traps; integrated memory circuits; interface states; bitline stress; degradation; flash memory cell; hole traps; interface states; negative oxide trapped charge; program/erase cycling; read-disturb; Channel hot electron injection; Degradation; EPROM; Flash memory cells; Hot carriers; Nonvolatile memory; Stress; Testing; Threshold voltage; Tunneling;
Conference_Titel :
Reliability Physics Symposium, 1997. 35th Annual Proceedings., IEEE International
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-3575-9
DOI :
10.1109/RELPHY.1997.584244
