DocumentCode :
3460222
Title :
Reliability of high aspect ratio plated through holes (PTH) for advanced printed circuit board (PCB) packages
Author :
Goval, D. ; Azimi, Hamid ; Chong, Kim Poh ; Lii, Mirng-Ji
Author_Institution :
Intel Corp., Chandler, AZ, USA
fYear :
1997
fDate :
8-10 Apr 1997
Firstpage :
129
Lastpage :
135
Abstract :
A plated-through hole (PTH) in multi-layer printed wiring boards (PWB) is defined as “a hole in which electrical connection is made between internal or external conductive patterns, or both, by plating of metal on the wall of the hole”. The recent trend to increase the packaging density at all levels has resulted in a significant increase in PWB wiring layers and in turn for PTH density in order to communicate between the layers of circuitry. The increase in overall PCB thickness, coupled to the decrease in PTH diameter makes the PTH integrity during the assembly process and subsequent field stresses one of the primary reliability concerns in PWB production and usage. Thermo-mechanical stresses mainly due to mismatch in out-of-plane (z-direction) coefficient of thermal expansion (CTE) between the PTH metal and the laminated material can result in the failure of the PTHs. Failure of a PTH constitutes an electrical discontinuity which may be caused by fracture of the plating material at the barrel, fracture at the land-barrel junction, or delamination of the plating from the PWB. This paper will discuss the reliability performance of the PTHs when subjected to T/C (Temperature Cycle) stresses. During the initial reliability stressing through 1000 T/C `B´ (-55 to 125°C) and T/C `C´ (-65 to 150°C) electrical opens were observed. Physical analysis showed that the opens were due to barrel cracking of the PTHs. Extensive mechanical modeling and experimental validation were used to suggest changes in the materials, process and design to eliminate barrel cracking in high aspect ratio PTHs. Results of these analyses will be discussed in detail
Keywords :
circuit reliability; packaging; printed circuits; thermal stresses; -55 to 125 C; -65 to 150 C; CTE mismatch; barrel cracking; delamination; electrical discontinuity; electrical opens; failure; fracture; high aspect ratio plated through holes; land-barrel junction; mechanical model; multi-layer printed wiring board; printed circuit board package; reliability; temperature cycle stress; thermomechanical stress; Assembly; Coupling circuits; Delamination; Inorganic materials; Packaging; Production; Thermal expansion; Thermal stresses; Thermomechanical processes; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium, 1997. 35th Annual Proceedings., IEEE International
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-3575-9
Type :
conf
DOI :
10.1109/RELPHY.1997.584249
Filename :
584249
Link To Document :
بازگشت