DocumentCode :
346031
Title :
Trade-offs of performance and single chip implementation of indoor wireless multi-access receivers
Author :
Zhang, Ning ; Poon, Ada ; Tse, David ; Brodersen, Robert ; Verdu, Sergio
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear :
1999
fDate :
1999
Firstpage :
226
Abstract :
The performance and computational complexity of five multi-access receivers are compared. A methodology is then presented for making area and power estimates of these algorithms for both software programmable DSP and dedicated direct mapped architectures. With this methodology and by using experimental data from previous designs, the feasibility of implementation of the multi-access receivers can be determined
Keywords :
CMOS digital integrated circuits; code division multiple access; computational complexity; digital signal processing chips; indoor radio; multi-access systems; radio receivers; CDMA; CMOS integrated circuit technology; computational complexity; dedicated direct mapped architectures; indoor wireless multi-access receivers; performance trade-offs; single chip implementation; software programmable DSP; Algorithm design and analysis; Bandwidth; Delay; Digital signal processing; Fading; Frequency diversity; Narrowband; Signal processing algorithms; Signal resolution; Spatial resolution;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Communications and Networking Conference, 1999. WCNC. 1999 IEEE
Conference_Location :
New Orleans, LA
ISSN :
1525-3511
Print_ISBN :
0-7803-5668-3
Type :
conf
DOI :
10.1109/WCNC.1999.797820
Filename :
797820
Link To Document :
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