Title :
Impact of boron penetration on gate oxide reliability and device lifetime in p+-poly PMOSFETs
Author :
Kim, B.Y. ; Liu, I.M. ; Luan, H.F. ; Gardner, M. ; Fulford, J. ; Kwong, D.L.
Author_Institution :
Microelectron. Res. Center, Texas Univ., Austin, TX, USA
Abstract :
The effect of boron penetration on device performance and reliability of p+-poly PMOSFETs was investigated in a wide RTA drive-in temperature range. High RTA drive-in temperature reduces the poly-depletion effect in NMOSFETs while causing significant boron-penetration induced mobility degradation in PMOSFETs, leading to difficulty in Id,sat optimization for a dual-gate CMOS process. Moreover, boron penetration enhances charge trapping in the oxide and interface state generation at the Si-SiO2 interface under F-N stress. The impact of this degradation mode on gate oxide reliability and device lifetime in the PMOSFETs is systematically demonstrated
Keywords :
CMOS integrated circuits; MOSFET; boron; carrier mobility; dielectric thin films; electric breakdown; elemental semiconductors; hot carriers; integrated circuit reliability; interface states; ion implantation; rapid thermal annealing; semiconductor device reliability; semiconductor-insulator boundaries; silicon; B penetration; F-N stress; Si-SiO2 interface; Si:BF2-SiO2:B; charge trapping; device lifetime; device performance; dual-gate CMOS process; gate oxide reliability; interface state generation; mobility degradation; p+-poly PMOSFETs; polysilicon p-channel MOSFET; wide RTA drive-in temperature range; Annealing; Boron; CMOS process; Degradation; Interface states; MOS devices; MOSFETs; Microelectronics; Temperature dependence; Temperature distribution;
Conference_Titel :
Reliability Physics Symposium, 1997. 35th Annual Proceedings., IEEE International
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-3575-9
DOI :
10.1109/RELPHY.1997.584275
