DocumentCode
346082
Title
Yield methodology-three phases approach
Author
Pouedras, Thierry ; Ben-Tzur, Mira
Author_Institution
Cypress Semicond., San Jose, CA, USA
fYear
1999
fDate
1999
Firstpage
14
Lastpage
17
Abstract
A novel yield methodology approach is developed. This methodology is applicable to each of the three phases from technology development to manufacturing. This methodology highlights the goals for each phase and describes all the procedures needed for optimizing the learning rate and reducing the cycle time between technology development and manufacturing
Keywords
integrated circuit testing; integrated circuit yield; production testing; quality control; IC manufacture; cycle time reduction; learning rate optimisation; semiconductor manufacturing; technology development; three phases approach; yield methodology; Continuous production; Failure analysis; Manufacturing processes; Optimized production technology; Pareto analysis; Qualifications; Scanning electron microscopy; Semiconductor device manufacture; Silicon; Software testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference and Workshop, 1999 IEEE/SEMI
Conference_Location
Boston, MA
ISSN
1078-8743
Print_ISBN
0-7803-5217-3
Type
conf
DOI
10.1109/ASMC.1999.798171
Filename
798171
Link To Document