Title :
CMOS programmable divider for Zigbee frequency synthesizer
Author :
Ismail, Nesreen M H ; Othman, Masuri
Author_Institution :
Inst. of MicroEngineering & Nanoelectron., Univ. Kebangsaan Malaysia (UKM), Bangi, Malaysia
Abstract :
This paper presents 4-bit integer N CMOS programmable frequency divider with high speed and low power consumption. It is based on a 15/16 dual-modulus prescaler, and programmable asynchronous and synchronous dividers. It works up to 3.4 GHz frequency clock and consumes 0.7 mW. It is tested in PLL for 2.4GHz band Zigbee standard. All results are taken from simulating extracted layout. It is implemented using Silterra 0.18-¿m CMOS process, and voltage supply 1.8V.
Keywords :
CMOS digital integrated circuits; UHF integrated circuits; asynchronous circuits; digital phase locked loops; frequency synthesizers; prescalers; programmable circuits; 4-bit integer N CMOS programmable frequency divider; PLL; Zigbee frequency synthesizer; dual-modulus prescaler; frequency 2.4 GHz; frequency 3.4 GHz; power 0.7 mW; programmable asynchronous dividers; programmable synchronous dividers; size 0.18 mum; voltage 1.8 V; Circuits and systems; Clocks; Counting circuits; Energy consumption; Frequency conversion; Frequency synthesizers; Logic; Nanoelectronics; Phase locked loops; ZigBee; Integer N Divider; Phase Locked Loop; Programmable Divider; Zigbee;
Conference_Titel :
Signals, Circuits and Systems (SCS), 2009 3rd International Conference on
Conference_Location :
Medenine
Print_ISBN :
978-1-4244-4397-0
Electronic_ISBN :
978-1-4244-4398-7
DOI :
10.1109/ICSCS.2009.5412594
