Characterization of parasitic impedance in a power electronics circuit board using TDR

Accurate extraction of the parasitic parameters on a printed circuit board (PCB) and establishment of a new design method for high-power density by considering the parasitic components will become major technological issues to increase the power density of converters. This study focuses on the time domain reflectometry (TDR) technique for the effective measurement of parasitic parameters on PCBs with complicated wiring arrangements. Extraction of some individual parasitic inductances existing on a buck chopper PCB can be realized by utilizing the interaction between a reverse-side ground layer and the printed wiring of the PCB. The accuracy of the measured parasitic inductances is verified by a comparison of experimental and simulation results.