DocumentCode :
3461165
Title :
RLC parasitic extraction and circuit model optimization for Cu/SiO2-90nm inductance structures
Author :
Hegazy, Hazem Mahmoud
Volume :
3
fYear :
2005
fDate :
4-6 Oct. 2005
Abstract :
An efficient interconnects modeling and optimization methodology is proposed for multi-GHz clock network design. High frequency effects, including inductance and proximity effects are captured. The results are validated through comparisons with electromagnetic simulations and measured data taken from a Cu/SiO2 90nm process test chip.
Keywords :
circuit optimisation; clocks; integrated circuit interconnections; integrated circuit modelling; 90 nm; Cu-SiO2; RLC parasitic extraction; circuit model optimization; high frequency effects; multi-GHz clock network design; proximity effects; Circuit simulation; Clocks; Data mining; Design optimization; Frequency; Inductance; Integrated circuit interconnections; Proximity effect; RLC circuits; Semiconductor device measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2005 European
Print_ISBN :
2-9600551-2-8
Type :
conf
DOI :
10.1109/EUMC.2005.1610268
Filename :
1610268
Link To Document :
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