Title :
Applications of digital PLL circuits in plesiohronos systems with positive pulse stuffing
Author :
Rabenovic, R. ; Kalezic, N.
Author_Institution :
IRITEL, Belgrade
Abstract :
The main purpose of this paper is to analyze parameters of the model based on digital PLL which contribute to a satisfaction of multiplex system jitter characteristics defined in appropriate ITU-T series of recommendations
Keywords :
digital phase locked loops; jitter; multiplexing equipment; time division multiplexing; ITU-T recommendations; digital PLL circuits; multiplex system jitter characteristics; plesiohronos systems; positive pulse stuffing; Circuit simulation; Clocks; Counting circuits; Detectors; Frequency; Jitter; Oscillators; Phase detection; Phase locked loops; Pulse circuits;
Conference_Titel :
Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on
Conference_Location :
Rodos
Print_ISBN :
0-7803-3650-X
DOI :
10.1109/ICECS.1996.584441
