DocumentCode :
3462210
Title :
Silicon-on-nothing (SON) technology
Author :
Skotnicki, Thomas ; Monfray, Stephane
Author_Institution :
STMicroelectronics, Crolles
fYear :
2006
fDate :
23-26 Oct. 2006
Firstpage :
11
Lastpage :
14
Abstract :
The "silicon on nothing" (SON) technology (Jurczak et al., 1999) and (Jurczak et al., 2000) is a promising candidate for the end-of-roadmap CMOS. In this paper we present the SON technology, show examples of sustained mono-Si nano-membranes over an empty tunnel, and deliberate on the suitability of this kind of 3-D nano-structures to build-up electronic devices. This technology opens a wide range of applications, in particular for the realization of localized single-gate fully depleted transistors on bulk substrates and of double-gate planar devices, co-integrable with bulk devices
Keywords :
CMOS integrated circuits; integrated circuit technology; nanostructured materials; nanotechnology; silicon; 3D nanostructures; bulk devices; bulk substrates; double-gate planar devices; electronic devices; end-of-roadmap CMOS; mono-Si nanomembranes; silicon-on-nothing technology; single-gate fully depleted transistors; CMOS technology; Capacitance; Electrostatics; Gate leakage; Nanoscale devices; Potential well; Silicon; Substrates; Thin film devices; Thin film transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
Type :
conf
DOI :
10.1109/ICSICT.2006.306043
Filename :
4098008
Link To Document :
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