DocumentCode :
3462234
Title :
A 128Ã\x97128 Single-Photon Imager with on-Chip Column-Level 10b Time-to-Digital Converter Array Capable of 97ps Resolution
Author :
Niclass, Cristiano ; Favi, Claudio ; Kluter, Theo ; Gersbach, Marek ; Charbon, Edoardo
Author_Institution :
Ecole Polytech. Fed. de Lausanne (EPFL), Lausanne
fYear :
2008
fDate :
3-7 Feb. 2008
Firstpage :
44
Lastpage :
594
Abstract :
We present an array of 128times128 highly miniaturized SPAD (single-photon avalanche diodes) pixels with a bank of 32 time-to-digital converters (TDCs) on chip. A decoder selects a 128-pixel row. Every group of 4 pixels in the row shares a TDC based on an event-driven mechanism. As a result, row-wise parallel acquisition is obtained with a low number of TDCs. Because of the outstanding timing precision of SPADs and an optimized TDC design, a typical resolution of 97 ps is achieved within a range of 100 ns (10 b) at a maximum rate of 10 MS/s per TDC. The TDC bank exhibits a DNL of 0.08LSB and an INL of 1.89LSB.
Keywords :
avalanche photodiodes; convertors; image sensors; integrated optoelectronics; decoder; event-driven mechanism; on-chip column-level time-to-digital converter array; optimized TDC design; row-wise parallel acquisition; single-photon avalanche diodes; single-photon imager; Calibration; Circuit testing; Delay lines; Image converters; Image resolution; Integrated circuit measurements; Optical arrays; Semiconductor device measurement; Sensor arrays; Signal resolution;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2010-0
Electronic_ISBN :
978-1-4244-2011-7
Type :
conf
DOI :
10.1109/ISSCC.2008.4523048
Filename :
4523048
Link To Document :
بازگشت