Author :
Bell, Shane ; Edwards, Bruce ; Amann, John ; Conlin, Rich ; Joyce, Kevin ; Leung, Vince ; MacKay, John ; Reif, Mike ; Bao, Liewei ; Brown, John ; Mattina, Matthew ; Miao, Chyi-Chang ; Ramey, Carl ; Wentzlaff, David ; Anderson, Walker ; Berger, Ethan ; Fai
Abstract :
The TILE64TM processor is a multicore SoC targeting the high-performance demands of a wide range of embedded applications across networking and digital multimedia applications. A figure shows a block diagram with 64 tile processors arranged in an 8x8 array. These tiles connect through a scalable 2D mesh network with high-speed I/Os on the periphery. Each general-purpose processor is identical and capable of running SMP Linux.
Keywords :
general purpose computers; microprocessor chips; system-on-chip; 2D mesh network; SMP Linux; general-purpose processor; mesh interconnect; system-on-chip; Bandwidth; Communication system control; Engines; Microprocessors; Read-write memory; Registers; Silicon; Tail; Telecommunication traffic; Tiles;
