DocumentCode :
3462666
Title :
Circuit Design for Voltage Scaling and SER Immunity on a Quad-Core Itanium® Processor
Author :
Krueger, Dan ; Francom, Erin ; Langsdorf, Jack
Author_Institution :
Intel, Fort Collins, CO
fYear :
2008
fDate :
3-7 Feb. 2008
Firstpage :
94
Lastpage :
95
Abstract :
The 700mm2 65nm Itaniumreg processor doubles the number of cores over its predecessor, from 2 to 4. It also adds a system interface that is roughly as large as two cores, including six QuickPath interconnects and four FBDIMM channels. This 3x increase in logic circuits per socket presents two major circuit challenges that are addressed in this paper.
Keywords :
integrated circuit design; integrated circuit interconnections; microprocessor chips; FBDIMM channels; QuickPath interconnects; SER immunity; circuit design; logic circuits; quad-core processor; system interfaces; Circuit synthesis; Costs; Latches; Microprocessors; Protection; Pulse circuits; Pulse generation; Solid state circuits; Timing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2010-0
Electronic_ISBN :
978-1-4244-2011-7
Type :
conf
DOI :
10.1109/ISSCC.2008.4523073
Filename :
4523073
Link To Document :
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