A 40Gb/s CMOS Serial-Link Receiver with Adaptive Equalization and CDR

Modern broadband communication systems require high-speed receivers to process serial data at tens of gigabits per second. As the data rate reaches 40Gb/s, skin-effect and dielectric loss in the transmission medium cause significant loss at high frequencies, leading to considerable ISI even if the data is transmitted over a short copper cable. To reduce the ISI and improve the BER, extensive equalization is required in the receiver side. It is also highly desirable to integrate the equalizer with the CDR circuit on the same chip. This paper describes a 40Gb/s CMOS serial-link receiver that performs both adaptive equalization and CDR.