Impact of strain-engineering on the low-frequency noise performance of advanced MOSFETs

This paper discusses the impact of strain on the low-frequency (LF) noise performance of deep submicrometer MOSFETs. The effect of different strain-engineering approaches, i.e., global, using strained silicon (sSi) substrates on thin SiGe strain-relaxed buffer (SRB) layers or local, relying on recessed SiGe source/drain (S/D) regions or nitride stressors is described. In the case of sSi nMOSFETs, it was shown that the 1/f noise spectral density can be up to a factor two to three lower, if no diffusion of Ge to the Si-SiO₂ interface occurs. This points to a better quality gate oxide grown on a tensile-strained silicon substrate. In the case of local strain, no degradation of the 1/f noise has been observed for SiON/poly silicon n- and pMOSFETs, which stands in contrast to conclusions from some other groups. Only in the case of a HfO₂/TiN gate stack, a marked increase of the 1/f noise was found for pMOSFETs with recessed S/D. The two times higher trap density is thought resulting from the extra thermal budget during the epitaxial deposition