Title :
Ge MOS transistor technology and reliability
Author_Institution :
Dept. of Electr. & Comput. Eng., Singapore Nat. Univ.
Abstract :
In this paper, recent developments in Ge MOS transistor technology and reliability are reviewed. High-k gate stack formation on Ge substrate is first addressed with emphasis on silicon surface passivation. Ge source/drain junction formation of using laser thermal annealing with small dopant loss is then discussed. With high performance Ge p- and n-channel MOSFETs, BTI and charge trapping are characterized
Keywords :
MOSFET; elemental semiconductors; germanium; laser beam annealing; semiconductor device reliability; semiconductor technology; substrates; thermal stability; BTI; MOS transistor reliability; MOS transistor technology; charge trapping; high-k gate stack formation; laser thermal annealing; silicon surface passivation; Annealing; Dielectric substrates; Germanium; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; MOSFETs; Passivation; Silicon; Surface treatment;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
DOI :
10.1109/ICSICT.2006.306095
