Title :
Implementation issues for congestion control in ATM networks
Author :
Marchese, M. ; Curatelli, F. ; Chirico, M. ; Mangeruca, L.
Author_Institution :
Genoa Univ., Italy
Abstract :
The design of Broadband Integrated Services Digital Networks (B-ISDN) requires the investigation of specific techniques to guarantee different Quality of Services (QoS) requirements for each traffic class in the network. In this context, a unified environment for the simulation and design of an ATM node is a useful approach to test the effectiveness and the implementation aspects of the techniques mentioned above. In this paper a complete ATM node has been modelled in VHDL in a modular and flexible way and critical computational aspects are investigated
Keywords :
B-ISDN; asynchronous transfer mode; hardware description languages; telecommunication congestion control; ATM network; B-ISDN; VHDL model; congestion control; quality of service; Admission control; Asynchronous transfer mode; B-ISDN; Computational modeling; Control systems; Intelligent networks; Quality of service; Scheduling; Telecommunication computing; Traffic control;
Conference_Titel :
Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on
Conference_Location :
Rodos
Print_ISBN :
0-7803-3650-X
DOI :
10.1109/ICECS.1996.584480
