DocumentCode :
346298
Title :
Impact of using adaptive body bias to compensate die-to-die Vt variation on within-die Vt variation
Author :
Narendra, Siva ; Antoniadis, Dimitri ; De, Vivek
Author_Institution :
Microsystems Technol. Lab., MIT, Cambridge, MA, USA
fYear :
1999
fDate :
17-17 Aug. 1999
Firstpage :
229
Lastpage :
232
Abstract :
Scaling of supply voltage (Vdd) is essential for controlling active power dissipation in complex digital circuits. Transistor threshold voltage (Vt) variation is one of the key limiters to Vdd scaling. Several adaptive body bias in schemes have been proposed earlier to reduce the impact of die-to-die Vt variation. Unfortunately, body bias degrades the short channel effect (SCE) in the MOSFET. As technology is scaled down, this adverse effect of body biasing poses an increasingly serious challenge to controlling SCE and results in worse within-die Vt variation. The scaling trends of body bias values required to reduce die-to-die Vt variations and the resulting increase in within-die Vt variation are presented across three different technology generations.
Keywords :
CMOS digital integrated circuits; compensation; low-power electronics; MOSFET; Vdd scaling; Vt variation; active power dissipation control; adaptive body bias; complex digital circuits; die-to-die Vt variation; short channel effect; supply voltage scaling; transistor threshold voltage variation; triple well CMOS process; within-die Vt variation; Clocks; Degradation; Delay; Digital circuits; Laboratories; MOSFET circuits; Microcomputers; Power dissipation; Threshold voltage; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on
Conference_Location :
San Diego, CA, USA
Print_ISBN :
1-58113-133-X
Type :
conf
Filename :
799444
Link To Document :
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